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? semiconductor components industries, llc, 2009 november, 2009 ? rev. 2 1 publication order number: ncp2991/d ncp2991 1.35 watt audio power amplifier with selectable fast turn on time the ncp2991 is an audio power amplifier designed for portable communication device applications such as mobile phone applications. the ncp2991 is capable of delivering 1.35 w of continuous average power to an 8.0 btl load from a 5.0 v power supply, and 1.1 w to a 4.0 btl load from a 3.6 v power supply. the ncp2991 provides high quality audio while requiring few external components and minimal power consumption. it features a low ? power consumption shutdown mode, which is achieved by driving the shutdown pin with logic low. the ncp2991 contains circuitry to prevent from ?pop and click? noise that would otherwise occur during turn ? on and turn ? off transitions. it is a zero pop noise device when a single ended or a differential audio input is used. for maximum flexibility, the ncp2991 provides an externally controlled gain (with resistors). in addition, it integrates 2 different turn on times (15 ms or 30 ms) adjustable with the ton pin. due to its superior psrr, it can be directly connected to the battery, saving the use of an ldo. this device is available in a 9 ? pin flip ? chip csp (lead ? free). features ? 1.35 w to an 8.0 btl load from a 5.0 v power supply ? best ? in ? class psrr: up to ? 100 db, direct connection to the battery ? zero pop noise signature with a single ended audio input ? ultra low current shutdown mode: 10 na ? 2.5 v ? 5.5 v operation ? external gain configuration capability ? external turn ? on time configuration capability: 15 ms or 30 ms ? thermal overload protection circuitry ? this is a pb ? free device* typical applications ? portable electronic devices ? pdas ? wireless phones *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting t echniques reference manual, solderrm/d. 9 ? pin flip ? chip csp fc suffix case 499e pin connections mrh = specific device code a = assembly location y = year ww = work week = pb ? free package marking diagrams a3 b3 c3 a2 b2 c2 a1 b1 c1 inm outa inp vm ton vp bypass outb shutdown (top view) see detailed ordering and shipping information in the package dimensions section on page 14 of this data sheet. ordering information mrh ayww http://onsemi.com a1
ncp2991 http://onsemi.com 2 figure 1. typical audio amplifier application circuit with single ended input + - + - v p inm v p v p 8 outa outb r1 20 k r2 20 k inp bypass 24 k 1 f 100 nf vm ton shutdown control c bypass 24 k 1 f cs shutdown rf ri ci audio input connect to v p or gnd figure 2. typical audio amplifier application circuit with a differential input + - + - v p inm v p v p 8 outa outb r1 20 k r2 20 k inp bypass 24 k 1 f 100 nf vm ton shutdown control c bypass 24 k 1 f cs shutdown rf ri ci audio input connect to v p or gnd 24 k 100 nf ri ci rf + ? 24 k
ncp2991 http://onsemi.com 3 pin description pin name type description a1 inm i negative input of the first amplifier, receives the audio input signal. connected to the feedback resistor r f and to the input resistor r in . a2 outa o negative output of the ncp2991. connected to the load and to the feedback resistor rf. a3 inp i positive input of the first amplifier, receives the common mode voltage. b1 vm i analog ground. b2 ton i ton pin selects 2 different turn on times: ton = gnd ? > 30 ms ton = vp ? > 15 ms b3 vp i positive analog supply of the cell. range: 2.5 v ? 5.5 v. c1 bypass i bypass capacitor pin which provides the common mode voltage (vp/2). c2 outb o positive output of the ncp2991. connected to the load. c3 shutdown i the device enters in shutdown mode when a low level is applied on this pin. maximum ratings (note 1) rating symbol value unit supply v oltage v p 6.0 v operating supply v oltage op vp 2.5 to 5.5 v ? input v oltage v in ? 0.3 to v cc +0.3 v power dissipation (note 2) pd internally limited ? operating ambient t emperature t a ? 40 to +85 c max junction temperature t j 150 c storage temperature range t stg ? 65 to +150 c thermal resistance junction ? to ? air r ja (note 3) c/w esd protection human body model (hbm) (note 4) machine model (mm) (note 5) ? 2000 200 v latchup current @ t a = 85 c (note 6) ? 100 ma stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. maximum electrical ratings are defined as those values beyond which damage to the device may occur at t a = +25 c. 2. the thermal shutdown set to 160 c (typical) avoids irreversible damage on the device due to power dissipation. 3. the r ja is highly dependent of the pcb heatsink area. for example, r ja can equal 195 c/w with 50 mm 2 total area and also 135 c/w with 500 mm 2 . the bumps have the same thermal resistance and all need to be connected to optimize the power dissipation. 4. human body model, 100 pf discharge through a 1.5 k resistor following specification jesd22/a114. 5. machine model, 200 pf discharged through all pins following specification jesd22/a115.
ncp2991 http://onsemi.com 4 electrical characteristics limits apply for t a between ? 40 c to +85 c (unless otherwise noted). characteristic symbol conditions min (note 6) typ max (note 6) unit supply quiescent current i dd v p = 2.5 v, no load v p = 5.0 v, no load ? ? 1.8 1.95 3.5 ma v p = 2.5 v, 8 v p = 5.0 v, 8 ? ? 1.8 1.95 3.5 common mode v oltage v cm ? ? v p /2 ? v shutdown current i sd ? 0.02 0.5 a shutdown pull ? down r sd ? 300 ? k shutdown voltage high v sdih ? 1.2 ? ? v shutdown voltage low v sdil ? ? ? 0.4 v turn on time (note 8) t wu ton = gnd ton = vp ? 30 15 ? ms turn off time t off ? ? 1.0 ? s output impedance in shutdown mode z sd ? ? 8.5 ? k output swing v loadpeak v p = 2.5 v, r l = 8.0 v p = 5.0 v, r l = 8.0 (note 7) t a = +25 c 1.9 3.8 2.4 4.7 ? ? v rms output power p o v p = 2.5 v, r l = 4.0 thd + n < 1% v p = 2.5 v, r l = 8.0 thd + n < 1% v p = 5.0 v, r l = 8.0 thd + n < 1% ? ? 0.5 0.3 1.35 ? ? w maximum power dissipation (note 8) p dmax v p = 5.0 v, r l = 8.0 ? ? 0.65 w output offset voltage v os v p = 2.5 v v p = 5.0 v ? 1.0 ? mv signal ? to ? noise ratio snr v p = 2.5 v, g = 2.0 20 hz < f < 20 khz ? 86 ? db positive supply rejection ratio psrr v+ g = 2.0, r l = 8.0 c by = 1.0 f input grounded f = 217 hz v p = 5.0 v v p = 4.2 v v p = 3.0 v f = 1.0 khz v p = 5.0 v v p = 4.2 v v p = 3.0 v ? ? ? ? ? ? ? 91 ? 91 ? 91 ? 103 ? 103 ? 103 ? ? ? ? ? ? db efficiency v p = 2.5 v, p orms = 320 mw v p = 5.0 v, p orms = 1.0 w ? ? 71 64 ? ? % thermal shutdown t emperature t sd ? 160 ? c total harmonic distortion thd v p = 2.5 v, f = 1.0 khz r l = 4.0 a v = 2.0 p o = 0.32 w v p = 5.0 v, f = 1.0 khz r l = 8.0 a v = 2.0 p o = 1.0 w ? ? ? ? ? ? ? 0.03 ? ? 0.015 ? ? ? ? ? ? ? % 6. min/max limits are guaranteed by design, test or statistical analysis. 7. this parameter is guaranteed but not tested in production in case of a 5.0 v power supply. 8. see page 13 for a theoretical approach of this parameter.
ncp2991 http://onsemi.com 5 typical characteristics figure 3. thd+n vs. frequency figure 4. thd+n vs. frequency frequency (hz) 10,000 1,000 100 0.01 0.1 1 figure 5. thd+n vs. frequency figure 6. thd+n vs. frequency figure 7. thd+n vs. frequency figure 8. thd+n vs. frequency thd+n (%) thd+n vp = 2.5 v p out = 100 mw r l = 8 frequency (hz) 10,000 1,000 100 0.01 0.1 thd+n (%) thd+n vp = 3 v p out = 250 mw r l = 8 1 frequency (hz) thd+n (%) frequency (hz) 10,000 1,000 100 0.01 0.1 1 thd+n (%) thd+n vp = 2.5 v p out = 100 mw r l = 4 frequency (hz) 10,000 1,000 100 0.01 0.1 1 thd+n (%) thd+n vp = 3 v p out = 250 mw r l = 4 frequency (hz) 10,000 1,000 100 0.01 0.1 1 thd+n (%) thd+n vp = 5 v p out = 500 mw r l = 4 10,000 1,000 100 0.01 0.1 1 thd+n vp = 5 v p out = 250 mw r l = 8
ncp2991 http://onsemi.com 6 typical characteristics figure 9. thd+n vs. frequency figure 10. thd+n vs. frequency frequency (hz) 10,000 1,000 100 0.001 0.1 1 figure 11. thd+n vs. frequency figure 12. thd+n vs. frequency figure 13. thd+n vs. frequency figure 14. thd+n vs. frequency thd+n (%) thd+n vp = 2.5 v p out = 100 mw r l = 8 differential input frequency (hz) 10,000 1,000 100 0.001 0.1 thd+n (%) 1 frequency (hz) 10,000 1,000 100 0.01 0.1 1 thd+n (%) thd+n vp = 5 v p out = 500 mw r l = 8 differential input thd+n (%) 10,000 1,000 100 0.01 0.1 1 frequency (hz) thd+n vp = 2.5 v p out = 100 mw r l = 4 differential input frequency (hz) 10,000 1,000 100 0.01 0.1 1 thd+n (%) thd+n vp = 3 v p out = 250 mw r l = 4 differential input frequency (hz) 10,000 1,000 100 0.01 0.1 1 thd+n (%) thd+n vp = 5 v p out = 500 mw r l = 4 differential input 0.01 thd+n vp = 3 v p out = 250 mw r l = 8 differential input 0.01
ncp2991 http://onsemi.com 7 typical characteristics figure 15. thd+n vs. p out p out (mw) 1200 400 0 0.01 0.1 10 figure 16. thd+n vs. p out figure 17. psrr vs. frequency figure 18. psrr vs. frequency thd (%) r l = 8 p out (mw) 1000 500 0 0.001 0.1 100 thd (%) thd+n r l = 8 differential input frequency (hz) psrr (db) 1 10 0.01 1500 2000 2500 vp = 2.5 v 2.7 v 3.0 v 3.3 v 3.6 v 5.0 v 5.5 v 1 800 1600 2000 vp = 2.5 v 4.2 v 3.0 v 3.3 v 3.6 v 5.0 v 5.5 v frequency (hz) 100,000 100 10 ? 120 ? 80 0 psrr (db) psrr vp = 3 v g = 2 input shorted to gnd differential configuration ? 100 ? 60 ? 40 ? 20 1,000 10,000 ? 11 0 ? 100 ? 90 ? 80 ? 70 ? 60 ? 50 10 100 1000 10000 100000 psrr vp = 3 v g = 2 input shorted to gnd
ncp2991 http://onsemi.com 8 typical characteristics figure 19. psrr vs. frequency figure 20. psrr vs. frequency figure 21. psrr vs. frequency figure 22. psrr vs. frequency figure 23. power dissipation vs. p out p out (mw) 2000 1800 600 400 1000 800 200 0 0 100 300 400 500 600 700 800 p dsp (mw) frequency (hz) psrr (db) frequency (hz) 100,000 100 10 ? 120 ? 80 0 psrr (db) psrr vp = 4.2 v g = 2 input shorted to gnd differential configuration ? 100 ? 60 ? 40 ? 20 1,000 10,000 frequency (hz) psrr (db) frequency (hz) 100,000 100 10 ? 120 ? 80 0 psrr (db) psrr vp = 5 v g = 2 input shorted to gnd differential configuration ? 100 ? 60 ? 40 ? 20 1,000 10,000 1600 200 1200 1400 r l = 8 vp = 2.5 v 2.7 v 3.0 v 3.3 v 3.6 v 5.0 v 5.5 v ? 11 0 ? 100 ? 90 ? 80 ? 70 ? 60 ? 50 10 100 1000 10000 100000 psrr vp = 4.2 v g = 2 input shorted to gnd ? 11 0 ? 100 ? 90 ? 80 ? 70 ? 60 ? 50 10 100 1000 10000 100000 psrr vp = 5 v g = 2 input shorted to gnd
ncp2991 http://onsemi.com 9 0 200 400 600 800 1000 1200 1400 1600 2.5 3.0 3.5 4.0 4.5 5.0 5.5 figure 24. maximum output power vs. v p v p (v) (mw) thd+n < 1% r i = 8 ch1 : outa ch2 : outb ch3 : /sd m1 = ch1 ? ch2 : dif ferential signal seen by the load figure 25. zero pop noise turn on sequence with single-ended input to ground (ci = 100 nf, ri = 24 k , rf = 24 k , cbyp = 1 f, rl = 8 , ton = gnd) ch1 : outa ch2 : outb ch3 : /sd m1 = ch1 ? ch2 : dif ferential signal seen by the load figure 26. zero pop noise turn on sequence with single-ended input audio source (ci = 100 nf, ri = 24 k , rf = 24 k , cbyp = 1 f, rl = 8 , ton = gnd) ch1 : outa ch2 : outb ch3 : /sd m1 = ch1 ? ch2 : dif ferential signal seen by the load figure 27. zero pop noise turn off sequence with single-ended input to ground (ci = 100 nf, ri = 24 k , rf = 24 k , cbyp = 1 f, rl = 8 , ton = gnd) ch1 : outa ch2 : outb ch3 : /sd m1 = ch1 ? ch2 : dif ferential signal seen by the load figure 28. zero pop noise turn off sequence with single-ended input audio source (ci = 100 nf, ri = 24 k , rf = 24 k , cbyp = 1 f, rl = 8 , ton = gnd)
ncp2991 http://onsemi.com 10 ch1 : outa ch2 : outb ch3 : /sd m1 = ch1 ? ch2 : dif ferential signal seen by the load figure 29. zero pop noise turn on sequence with differential input to ground (ci = 100 nf, ri = 24 k , rf = 24 k , cbyp = 1 f, rl = 8 , ton = gnd) ch1 : outa ch2 : outb ch3 : /sd m1 = ch1 ? ch2 : dif ferential signal seen by the load figure 30. zero pop noise turn on sequence with differential input audio source (ci = 100 nf, ri = 24 k , rf = 24 k , cbyp = 1 f, rl = 8 , ton = gnd) ch1 : outa ch2 : outb ch3 : /sd m1 = ch1 ? ch2 : dif ferential signal seen by the load figure 31. zero pop noise turn off sequence with differential input to ground (ci = 100 nf, ri = 24 k , rf = 24 k , cbyp = 1 f, rl = 8 , ton = gnd) ch1 : outa ch2 : outb ch3 : /sd m1 = ch1 ? ch2 : dif ferential signal seen by the load figure 32. zero pop noise turn off sequence with differential input audio source (ci = 100 nf, ri = 24 k , rf = 24 k , cbyp = 1 f, rl = 8 , ton = gnd)
ncp2991 http://onsemi.com 11 ch1 : outa ch2 : outb ch3 : /sd m1 = ch1 ? ch2 : dif ferential signal seen by the load figure 33. zero pop noise turn on sequence with single-ended input to ground (ci = 47 nf, ri = 24 k , rf = 24 k , cbyp = 1 f, rl = 8 , ton = vp) ch1 : outa ch2 : outb ch3 : /sd m1 = ch1 ? ch2 : dif ferential signal seen by the load figure 34. zero pop noise turn on sequence with single-ended input audio source (ci = 47 nf, ri = 24 k , rf = 24 k , cbyp = 1 f, rl = 8 , ton = vp) ch1 : outa ch2 : outb ch3 : /sd m1 = ch1 ? ch2 : dif ferential signal seen by the load figure 35. zero pop noise turn off sequence with single-ended input to ground (ci = 47 nf, ri = 24 k , rf = 24 k , cbyp = 1 f, rl = 8 , ton = vp) ch1 : outa ch2 : outb ch3 : /sd m1 = ch1 ? ch2 : dif ferential signal seen by the load figure 36. zero pop noise turn off sequence with single-ended input audio source (ci = 47 nf, ri = 24 k , rf = 24 k , cbyp = 1 f, rl = 8 , ton = vp)
ncp2991 http://onsemi.com 12 ch1 : outa ch2 : outb ch3 : /sd m1 = ch1 ? ch2 : dif ferential signal seen by the load figure 37. zero pop noise turn on sequence with differential input to ground (ci = 47 nf, ri = 24 k , rf = 24 k , cbyp = 1 f, rl = 8 , ton = vp) ch1 : outa ch2 : outb ch3 : /sd m1 = ch1 ? ch2 : dif feren- tial signal seen by the load figure 38. zero pop noise turn on sequence with differential input audio source (ci = 47 nf, ri = 24 k , rf = 24 k , cbyp = 1 f, rl = 8 , ton = vp) ch1 : outa ch2 : outb ch3 : /sd m1 = ch1 ? ch2 : dif ferential signal seen by the load figure 39. zero pop noise turn off sequence with differential input to ground (ci = 47 nf, ri = 24 k , rf = 24 k , cbyp = 1 f, rl = 8 , ton = vp) ch1 : outa ch2 : outb ch3 : /sd m1 = ch1 ? ch2 : dif ferential signal seen by the load figure 40. zero pop noise turn off sequence with differential input audio source (ci = 47 nf, ri = 24 k , rf = 24 k , cbyp = 1 f, rl = 8 , ton = vp)
ncp2991 http://onsemi.com 13 application information detailed description the ncp2991 audio amplifier can operate under 2.5 v until 5.5 v power supply. with less than 1% thd + n, it can deliver up to 1.35 w rms output power to an 8.0 load (v p = 5.0 v). if application allows to reach 10% thd + n, then 1.65 w can be provided using a 5.0 v power supply. the structure of the ncp2991 is basically composed of two identical internal power amplifiers; the first one is externally configurable with gain ? setting resistors r in and r f (the closed ? loop gain is fixed by the ratios of these resistors) and the second is internally fixed in an inverting unity ? gain configuration by two resistors of 20 k . so the load is driven differentially through outa and outb outputs. this configuration eliminates the need for an output coupling capacitor. internal power amplifier the output pmos and nmos transistors of the amplifier were designed to deliver the output power of the specifications without clipping. the channel resistance (r on ) of the nmos and pmos transistors does not exceed 0.6 when they drive current. the structure of the internal power amplifier is composed of three symmetrical gain stages, first and medium gain stages are transconductance gain stages to obtain maximum bandwidth and dc gain. turn ? on and turn ? off t ransitions when a shutdown low level is applied, the output level is tied to ground on each output after 10 s. with t on = gnd, turn on time is set to 30 ms. with t on = v p , turn on time is set to 15 ms. to avoid any pop and click noises, r in * c in < 2.4 ms with t on = gnd and r in * c in < 1.2 ms with t on = vp. the electrical characteristics are identical with the 2 configurations. this fast turn on time added to a very low shutdown current saves battery life and brings flexibility when designing the audio section of the final application. ncp2991 is a zero pop noise device when using a single ? ended or differential audio input configuration. shutdown function the device enters shutdown mode when shutdown signal is low. during the shutdown mode, the dc quiescent current of the circuit does not exceed 100 na. in this configuration, the output impedance is 8.5 k on each output. current limit circuit the maximum output power of the circuit (p orms = 1.0 w, v p = 5.0 v, r l = 8.0 ) requires a peak current in the load of 500 ma. in order to limit the excessive power dissipation in the load when a short ? circuit occurs, the current limit in the load is fixed to 1.1 a. the current in the four output mos transistors are real ? time controlled, and when one current exceeds 1.1 a, the gate voltage of the mos transistor is clipped and no more current can be delivered. thermal overload protection internal amplifiers are switched off when the temperature exceeds 160 c, and will be switched on again only when the temperature decreases fewer than 140 c. the ncp2991 is unity ? gain stable and requires no external components besides gain ? setting resistors, an input coupling capacitor and a proper bypassing capacitor in the typical application. the first amplifier is externally configurable (r f and r in ), while the second is fixed in an inverting unity gain configuration. the differential ? ended amplifier presents two major advantages: ? the possible output power is four times larger (the output swing is doubled) as compared to a single ? ended amplifier under the same conditions. ? output pins (outa and outb) are biased at the same potential v p /2, this eliminates the need for an output coupling capacitor required with a single ? ended amplifier configuration. the differential closed loop ? gain of the amplifier is given by a vd 2* r f r in v orms v inrms . output power delivered to the load is given by p orms (vopeak) 2 2*r l (v opeak is the pe ak differential output voltage). when choosing gain configuration to obtain the desired output power, check that the amplifier is not current limited or clipped. the maximum current which can be delivered to the load is 500 ma i opeak v opeak r l . gain ? setting resistor selection (r in and r f ) r in and r f set the closed ? loop gain of the amplifier. in order to optimize device and system performance, the ncp2991 should be used in low gain configurations. the low gain configuration minimizes thd + noise values and maximizes the signal to noise ratio, and the amplifier can still be used without running into the bandwidth limitations. a closed loop gain in the range from 2 to 5 is recommended to optimize overall system performance. an input resistor (r in ) value of 24 k is realistic in most of applications, and doesn?t require the use of a too large capacitor c in . input capacitor selection (c in ) the input coupling capacitor blocks the dc voltage at the amplifier input terminal. this capacitor creates a
ncp2991 http://onsemi.com 14 high ? pass filter with r in , the cut ? off frequency is given by fc 1 2* *r in *c in . the size of the capacitor must be large enough to couple in low frequencies without severe attenuation. iec 61000-4-2 level 4 in some particular applications, ncp2991 may need extra esd protection to pass iec 61000-4-2 level 4 qualification. depending on the test, user can consider different level of protection: ? up to 22 pf capacitor connected between each amplifier output terminals and ground. ? dedicated iec filters such as esd7.0 series from on semiconductor. in any case, the protection should be placed as close as possible to the esd stress entry point. proper and carefull layout is a key factor to ensure optimum protection level is achieved. designer should make sure the connection impedance between protection and ground / protection and ncp2991 is as low as possible. ordering information device package shipping ? NCP2991FCT2G 9 ? pin flip ? chip (pb ? free) 3000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd801 1/d.
ncp2991 http://onsemi.com 15 package dimensions 9 pin flip ? chip case 499e ? 01 issue a dim min max millimeters a 0.540 0.660 a1 0.210 0.270 a2 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeters. 3. coplanarity applies to spherical crowns of solder balls. e d ? a ? ? b ? 0.10 c a2 a a1 ? c ? 0.05 c 0.10 c 4 x seating plane d1 e e1 e 0.05 c 0.03 c a b 9 x b c b a 12 3 d 1.450 bsc e 0.330 0.390 b 0.290 0.340 e 0.500 bsc d1 1.000 bsc e1 1.000 bsc 1.450 bsc side view top view bottom view on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, in cluding without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different a pplications and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical e xperts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc prod uct could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indem nify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney f ees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was neglig ent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 ncp2991/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc a sales representative

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